1. Field of the Invention
The present invention relates to a CMOS integrated circuit device and an inspecting method and an inspecting device thereof.
2. Description of the Prior Art
In general, when the threshold value of a MOSFET is reduced, since the current driving capability of the MOSFET increases, the circuit can operate at high speed, so that it is possible to realize a high performance LSI. On the other hand, in the case where the supply voltage is reduced to lower the power consumption, it is possible to realize a low power consumption, without decreasing the operation speed, by reducing the threshold value of the MOSFET.
By the way, in the case where a CMOS integrated circuit provided with CMOS circuits having P-channel MOS transistors and N-channel MOS transistors is required to be inspected, there has been widely adopted such an inspection method that a defective CMOS integrated circuit can be selectively rejected by checking the static current of the voltage supply. In this inspection method, after a supply voltage is applied to the CMOS integrated circuit, an H- or L-level signal is given to an input terminal thereof, to measure the current flowing through the voltage supply. In this case, when a large current beyond a predetermined value flows therethrough, the chip is regarded as being mixed with some defective CMOS circuits and thereby selectively rejected. The reason why such method can be used is that the CMOS circuit is provided with such a feature that voltage supply current (a static supply voltage current) does not flow on condition that the input of the CMOS circuit does not change (i.e., in a static status).
In this case, however, when the threshold value of the MOSFET is reduced, since the sub-threshold current of the MOSFET increases and thereby a relatively large static voltage supply current flows even through a non-defective chip, this inspection method cannot be adopted. As a result, there exists such a problem in that the defective chips are erroneously selected and put on the market or that an excessive inspection cost is required to prevent the defective chips from being mixed with the non-defective chips.